Conference Schedule

Thursday, November 4, 2010

Track 1 - ReSpace

Session IV -On The Horizon
7:30 am	Breakfast
8:30 am - 8:50 am	Furano: CANopen Networks As An Enabler For Modern Space-Borne Control Systems: The European Space Agency’s Perspective
8:50 am - 9:10 am	Vahid - Composing Video/Sensor-Based Automated Notification Systems Using Spatial Programming
9:10 am - 9:30 am	Wender: Monolithic-MCM Analog IC Design For Space
9:30 am - 10:00 am	Anderson: Psoc
10:00 am - 10:30 am	Break
10:30 am - 10:50 am	Santangelo: QuickSAT and the step_SATdb database, a web based and open source concurrent satellite design automation environment
10:50 am - 11:10 am	Pattichis: Adaptive Wiring Manifold
11:10 am - 11:30 am	Sharma: A Virus-Based Transistor For Integrated Molecular-Scale Circuits
11:50 am	Lunch, Closing

Track 2 - MAPLD

Session D - Designing with FPGAs and PLDs
7:30 am	Breakfast
8:30 am - 8:50 am	Habinc: Implementing SpaceWire Routers As Standard Products Using FPGA Technology
8:50 am - 9:10 am	Wirthlin: Dynamic Partial Reconfiguration Of Softcore Processors On The Virtex 5
9:10 am - 9:30 am	Platzker: FPGA SynthesisBased Radiation Effects Mitigation Using Triple Modular Redundancy And Safe FSM Implementations
9:30 am - 9:50 am	Walters: Radiation Hardening By Software For The Embedded PowerPC, Preliminary Findings
9:50 am - 10:10 am	Nguyen: Actel RTAX-DSP Design Techniques For High Reliability Application
10:10 am - 10:30 am	Break
10:30 am - 10:50 am	Smith: Applying Modern Verification Methods To VHDL Designs
10:50 am - 11:10 am	Wang: Design Choices And Guidelines For Configuration Monitoring And Management Of The RHBD Virtex-5QV Space-grade FPGA
11:10 am - 11:30 am	Swift: Prototyping V-5QV Space Applications Using The Commercial-Grade FPGAs And Boards
11:30 am - 11:50 am	Ginosar: A Design Flow For FPGA Conversion Into Radiation-Hardened ASIC
11:50 am	Lunch, Closing