Tutorial 1 provides an introduction to VHDL ,digital logic design, and the Xilinx ISE environment. Readers will learn how to create a new project with Xilinx ISE, simulate a design containing basic logic gates, and implement the design on the Digilent Spartan 3E Starter or Nexys 2 Board.

This project was done with ISE 9.2 and ModelsimXE

Click here for the Word file for the project

Click here to download the entire project as a .zip file.

This project was done with ISE 10.1 and ISE simulator

Click here for the Word file for the project

Click here for the pdf file for the project

Click here for the open office file of the project

Click here to download the entire project as a .zip file

This project was done with ISE 12 and ISE simulator for the Digilent Nexys 2 Board.

Click here for the Word file for the project

Click here for the pdf file for the project

Click here to download the source files as .zip file

Here is an online Video that goes through this process as well as FPGA and software basics.  It is not identical to this tutorial but very close